The present invention relates to a semiconductor switching device using silicon carbide.
Silicon carbide (SiC) has been now regarded as an important material for semiconductor switching devices applicable to circumstances to which silicon is hardly applicable or semiconductor devices with such properties that silicon cannot attain.
Silicon carbide has a band gap about three times as large as that of silicon and thus is applicable to considerably higher temperatures than the application limit temperature (150xc2x0 C.) of silicon. Furthermore, silicon carbide has a larger dielectric breakdown voltage, e.g. larger by approximately one order of magnitute, and thus can reduce the resistance of a power semiconductor device designed for constant voltage-withstand to one-tenth or less than that of silicon device.
These distinguished properties of silicon carbide are all due to a very strong bounding force between carbon and silicon in the silicon carbide crystal, which, on the other hand, brings about various problems in processes for forming semiconductor devices, though.
For example, in case of forming a semiconductor region of counter-conductive type on parts of p- or n-type semiconductor crystal substrate surface, a diffusion process is usually used in case of silicon, but in case of silicon carbide the diffusion rate of impurity elements in the crystal is very low because of the strong bonding and thus the diffusion process, when applied to silicon carbide, will require high temperatures such as 2,000xc2x0 C. or higher and a long processing time, rendering its practical application substantially impossible. In case of producing a semiconductor device based on silicon carbide, the so called ion implantation process is used, which implants ions of necessary elements for forming a semiconductor region through openings of a mask coated on a semiconductor crystal substrate surface under an acceleration voltage of a few tens to a few hundred kV, as disclosed in JP-A-6-151860.
However, in the ion implantation process, many defects are introduced into the crystal during the implantation, causing another problem. To improve the defects and activate impurity elements in the implanted layer, a heat treatment is usually carried out. In case of silicon carbide, the heat treatment is carried out at high temperatures e.g. 1,400xc2x0 C. to 1,700xc2x0 C. but, as disclosed, for example, in Silicon Carbide and Related Materials 1995 (Proceedings of the Sixth International Conference), p. 513, many defects still remain even after the heat treatment. The residual defects are a cause of leak current when an inverse voltage is applied to the pn junction of a semiconductor switching device based on silicon carbide.
The present semiconductor switching device comprises a silicon carbide single crystal of hexagonal symmetry having a first conductive type (p- or n-type) and a semiconductor region having a second conductive type opposite to the first conductive type and locating in the silicon carbide single crystal. A pn junction is formed between the silicon carbide single crystal of first conductive type and the semiconductor region of second conductor type. The pn junction interface includes an interface extended in the depth direction from the surface of silicon carbide single crystal, and the extended interface includes a crystal plane in parallel to the  less than 1120 greater than  orientation of silicon carbide single crystal or approximately in parallel thereto, where the underline given below the orientation index xe2x80x9c2xe2x80x9d has the same meaning as that of xe2x80x9cxe2x88x92xe2x80x9d given above the index in the conventional crystallographic rotation. As will be described later, in the semiconductor region of second conductive type, crystal defects formed on the crystal plane in parallel to the  less than 1120 greater than  orientation or approximately in parallel thereto with a deviation therefrom within an angle of a few degrees are smaller in size than those formed on other crystal planes, and thus the leak current density generated on the crystal plane in parallel to the  less than 1120 greater than  or approximately, in parallel thereto is lower than that generated on other crystal planes. That is, the inclusion of the crystal plane in parallel to the  less than 1120 greater than  orientation or approximately in parallel thereto in the pn junction interface can reduce the leak current in the semiconductor device based on the silicon carbide single crystal.
Having made detailed observations of defects remaining in the silicon carbide single crystal after the introduction of impurity by ion implantation, etc., the present inventors have newly found in that the defects in the hexagonal silicon carbide single crystal were in the following states: observations from different directions of cross-sections of impurity layer formed in the silicon carbide single crystal revealed that the state and distribution of defects as observed differed from one direction to another and the defect size was larger when observed from the  less than 1120 greater than  orientation of crystallographic orientation index of silicon carbide single crystal, whereas the defect size was smaller or substantially unobservable, when observed from the  less than 1100 greater than  orientation.
FIG. 1(a), (b) and (c) are structural views showing the respective crystal planes {0001}, {1100} and the respective orientations  less than 1100 greater than  and  less than 1120 greater than  in unit lattice of hexagonal silicon carbide single crystal, where the orientations  less than 1100 greater than  and  less than 1120 greater than  are perpendicular to the planes {1100} and {1120}, respectively. Angle of the  less than 1120 greater than  orientation to the  less than 1100 greater than  orientation is 90 degrees or 30 degrees.
It is preferable that a proportion of the crystal plane in parallel to the  less than 1120 greater than  orientation of silicon carbide single crystal or approximately in parallel thereto, which is included in the pn junction interface extended in the depth direction from the surface of silicon carbide single crystal, is larger. According to the present inventions"" study, it is preferable that the proportion is larger than a half of the entire interface extended in the depth direction from the surface of silicon carbide single crystal at the pn junction interface.
The present invention is applicable to such a semiconductor switching device having a pn junction that a depletion layer is extended from the pn junction in a working state or a blocking state. Furthermore, the present invention is also applicable to a semiconductor switching device having a pn junction for injecting carriers into the semiconductor switching device. In that case, the present invention is effective for improving the carrier injection efficiency at the pn junction and reducing the on-state voltage or power loss of the semiconductor switching device.